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1 Ergebnisse
1
Optimal design of short circuit robustness for high voltage..:
, In:
2023 IEEE 15th International Conference on ASIC (ASICON)
,
Jin, Rui
;
Ge, Niannian
;
Nie, Ruifen
... - p. 1-5 , 2023
Link:
https://doi.org/10.1109/ASICON58565.2023.10396443
RT T1
2023 IEEE 15th International Conference on ASIC (ASICON)
: T1
Optimal design of short circuit robustness for high voltage and high power IGBTs
UL https://suche.suub.uni-bremen.de/peid=ieee-10396443&Exemplar=1&LAN=DE A1 Jin, Rui A1 Ge, Niannian A1 Nie, Ruifen A1 Tian, Baohua A1 He, Feng A1 Hao, Xiamin YR 2023 SN 2162-755X K1 Insulated gate bipolar transistors K1 Buffer layers K1 Voltage measurement K1 High-voltage techniques K1 Valves K1 Robustness K1 Power grids K1 IGBT K1 buffer layer K1 backside implantation K1 on-state voltage drop K1 short-circuit robustness SP 1 OP 5 LK http://dx.doi.org/https://doi.org/10.1109/ASICON58565.2023.10396443 DO https://doi.org/10.1109/ASICON58565.2023.10396443 SF ELIB - SuUB Bremen
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