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1 Ergebnisse
1
A Low-complexity Max Unpooling Achitecture for CNNs:
, In:
2023 IEEE 15th International Conference on ASIC (ASICON)
,
Zhang, Xiaojun
;
Zhu, Chenshi
;
Han, Qin
.. - p. 1-4 , 2023
Link:
https://doi.org/10.1109/ASICON58565.2023.10396552
RT T1 <cTitle>2023 IEEE 15th International Conference on ASIC (ASICON)</cTitle>: T1 <Title>A Low-complexity Max Unpooling Achitecture for CNNs</Title> UL https://suche.suub.uni-bremen.de/peid=ieee-10396552&Exemplar=1&LAN=DE A1 Zhang, Xiaojun A1 Zhu, Chenshi A1 Han, Qin A1 Wang, Zhengrong A1 Zhang, Dexue YR 2023 SN 2162-755X K1 Training K1 Frequency synthesizers K1 Deconvolution K1 Costs K1 Computer architecture K1 Hardware K1 Convolutional neural networks K1 Convolution neural network K1 FPGA K1 Hardware acceleration K1 Max unpooling SP 1 OP 4 LK http://dx.doi.org/https://doi.org/10.1109/ASICON58565.2023.10396552 DO https://doi.org/10.1109/ASICON58565.2023.10396552 SF ELIB - SuUB Bremen
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