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1 Ergebnisse
1
High-Resolution Programmable Delay Line IP-Core based on Di..:
, In:
2022 IEEE Nuclear Science Symposium and Medical Imaging Conference (NSS/MIC)
,
Corna, N.
;
Garzetti, F.
;
Lusardi, N.
... - p. 1-5 , 2022
Link:
https://doi.org/10.1109/NSS/MIC44845.2022.10399032
RT T1 <cTitle>2022 IEEE Nuclear Science Symposium and Medical Imaging Conference (NSS/MIC)</cTitle>: T1 <Title>High-Resolution Programmable Delay Line IP-Core based on Digital-to-Time Converter for FPGAs</Title> UL https://suche.suub.uni-bremen.de/peid=ieee-10399032&Exemplar=1&LAN=DE A1 Corna, N. A1 Garzetti, F. A1 Lusardi, N. A1 Costa, A. A1 Ronconi, E. A1 Cattaneo, M. A1 Geraci, A. YR 2022 SN 2577-0829 K1 Power demand K1 Logic gates K1 Delay lines K1 Delays K1 System-on-chip K1 Field programmable gate arrays K1 Graphical user interfaces K1 Digital-to-Time Converter (DTC) K1 Delay-Line (DL) K1 Time-to-Digital Converter (TDC) K1 Field-Programmable Gate Array (FPGA) K1 System-on-Chip (SoC) SP 1 OP 5 LK http://dx.doi.org/https://doi.org/10.1109/NSS/MIC44845.2022.10399032 DO https://doi.org/10.1109/NSS/MIC44845.2022.10399032 SF ELIB - SuUB Bremen
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