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1 Ergebnisse
1
Design and Implementation of Full Adder Circuit Based on VT..:
, In:
2023 IEEE 66th International Midwest Symposium on Circuits and Systems (MWSCAS)
,
Mozafari, Farzad
;
Ahmadi, Majid
;
Ahmadi, Arash
- p. 389-393 , 2023
Link:
https://doi.org/10.1109/MWSCAS57524.2023.10405980
RT T1
2023 IEEE 66th International Midwest Symposium on Circuits and Systems (MWSCAS)
: T1
Design and Implementation of Full Adder Circuit Based on VTM-Logic Gates
UL https://suche.suub.uni-bremen.de/peid=ieee-10405980&Exemplar=1&LAN=DE A1 Mozafari, Farzad A1 Ahmadi, Majid A1 Ahmadi, Arash YR 2023 SN 1558-3899 K1 Power demand K1 Memristors K1 Voltage K1 Logic gates K1 SPICE K1 Adders K1 Propagation delay K1 Memristor K1 XOR/XNOR logic gates K1 convert voltage to memristance (VTM) K1 full adder SP 389 OP 393 LK http://dx.doi.org/https://doi.org/10.1109/MWSCAS57524.2023.10405980 DO https://doi.org/10.1109/MWSCAS57524.2023.10405980 SF ELIB - SuUB Bremen
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