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1 Ergebnisse
1
A Multi-Core Verification Method of Vector Instructions Bas..:
, In:
2023 Asia-Pacific Conference on Image Processing, Electronics and Computers (IPEC)
,
Li, Xianqin
;
Liu, Liang
;
Li, Dejian
... - p. 406-410 , 2023
Link:
https://doi.org/10.1109/IPEC57296.2023.00076
RT T1 <cTitle>2023 Asia-Pacific Conference on Image Processing, Electronics and Computers (IPEC)</cTitle>: T1 <Title>A Multi-Core Verification Method of Vector Instructions Based on Spike</Title> UL https://suche.suub.uni-bremen.de/peid=ieee-10412722&Exemplar=1&LAN=DE A1 Li, Xianqin A1 Liu, Liang A1 Li, Dejian A1 Zhang, Xige A1 Jiang, Yichu A1 Zhao, Hao A1 Sun, Yufeng A1 Ding, Zhengyang YR 2023 K1 Uncertainty K1 Multicore processing K1 Instruction sets K1 Image processing K1 Programming K1 Monitoring K1 Standards K1 RISC-V K1 Spike K1 DUT K1 vector instructions K1 multi-core processor SP 406 OP 410 LK http://dx.doi.org/https://doi.org/10.1109/IPEC57296.2023.00076 DO https://doi.org/10.1109/IPEC57296.2023.00076 SF ELIB - SuUB Bremen
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