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1 Ergebnisse
1
Design of Hardwired Control Unit Using Reversible Gates for..:
, In:
2023 Global Conference on Information Technologies and Communications (GCITC)
,
Devi, V. Rama
;
Sreedhar, Jadapalli
- p. 1-5 , 2023
Link:
https://doi.org/10.1109/GCITC60406.2023.10425882
RT T1 <cTitle>2023 Global Conference on Information Technologies and Communications (GCITC)</cTitle>: T1 <Title>Design of Hardwired Control Unit Using Reversible Gates for RISC Architecture Based Processor</Title> UL https://suche.suub.uni-bremen.de/peid=ieee-10425882&Exemplar=1&LAN=DE A1 Devi, V. Rama A1 Sreedhar, Jadapalli YR 2023 K1 Process control K1 Computer architecture K1 Logic gates K1 Very large scale integration K1 Decoding K1 Central Processing Unit K1 Flip-flops K1 Control unit K1 CPU K1 Hardwired control unit K1 decoders K1 sequence counter K1 reversible logic K1 HL gate K1 BJ gate SP 1 OP 5 LK http://dx.doi.org/https://doi.org/10.1109/GCITC60406.2023.10425882 DO https://doi.org/10.1109/GCITC60406.2023.10425882 SF ELIB - SuUB Bremen
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