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1 Ergebnisse
1
Low-Power Approximate Multiplier Architecture for Error Res..:
, In:
2023 11th International Conference on Intelligent Systems and Embedded Design (ISED)
,
Kumari, Apurva
;
Vandana, Ch.
;
Rao, Chowta Mallikharjuna
.. - p. 1-5 , 2023
Link:
https://doi.org/10.1109/ISED59382.2023.10444585
RT T1 <cTitle>2023 11th International Conference on Intelligent Systems and Embedded Design (ISED)</cTitle>: T1 <Title>Low-Power Approximate Multiplier Architecture for Error Resilient Applications</Title> UL https://suche.suub.uni-bremen.de/peid=ieee-10444585&Exemplar=1&LAN=DE A1 Kumari, Apurva A1 Vandana, Ch. A1 Rao, Chowta Mallikharjuna A1 Kumar, Uppugunduru Anil A1 Ahmed, Syed Ershad YR 2023 K1 Image coding K1 Error analysis K1 Computer architecture K1 Logic gates K1 Hardware K1 Error correction K1 Intelligent systems K1 Approximate computing K1 multiplier K1 error correction module SP 1 OP 5 LK http://dx.doi.org/https://doi.org/10.1109/ISED59382.2023.10444585 DO https://doi.org/10.1109/ISED59382.2023.10444585 SF ELIB - SuUB Bremen
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