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1 Ergebnisse
1
10.4 A 45.5fs-Integrated-Random-Jitter and -75dBc-Integer-B..:
, In:
2024 IEEE International Solid-State Circuits Conference (ISSCC)
,
Kennedy, Michael Peter
;
Mazzaro, Valerio
;
Tulisi, Stefano
... - p. 194-196 , 2024
Link:
https://doi.org/10.1109/ISSCC49657.2024.10454462
RT T1 <cTitle>2024 IEEE International Solid-State Circuits Conference (ISSCC)</cTitle>: T1 <Title>10.4 A 45.5fs-Integrated-Random-Jitter and -75dBc-Integer-Boundary-Spur BiCMOS Fractional-N PLL with Suppression of Fractional, Horn, and Wandering Spurs</Title> UL https://suche.suub.uni-bremen.de/peid=ieee-10454462&Exemplar=1&LAN=DE A1 Kennedy, Michael Peter A1 Mazzaro, Valerio A1 Tulisi, Stefano A1 Scully, Micheal A1 McDermott, Niall A1 Breslin, James YR 2024 SN 2376-8606 K1 Phased arrays K1 Charge pumps K1 Quantization (signal) K1 Image edge detection K1 Phase frequency detectors K1 Delta-sigma modulation K1 Time measurement SP 194 OP 196 LK http://dx.doi.org/https://doi.org/10.1109/ISSCC49657.2024.10454462 DO https://doi.org/10.1109/ISSCC49657.2024.10454462 SF ELIB - SuUB Bremen
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