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1 Ergebnisse
1
An Architecture-Level Framework for Enabling Processing-Usi..:
, In:
2024 International Conference on Electronics, Information, and Communication (ICEIC)
,
Hwang, Inseong
;
Jang, Jihoon
;
Kim, Hyun
- p. 1-3 , 2024
Link:
https://doi.org/10.1109/ICEIC61013.2024.10457163
RT T1 <cTitle>2024 International Conference on Electronics, Information, and Communication (ICEIC)</cTitle>: T1 <Title>An Architecture-Level Framework for Enabling Processing-Using-Memory Simulations in Deep Neural Networks</Title> UL https://suche.suub.uni-bremen.de/peid=ieee-10457163&Exemplar=1&LAN=DE A1 Hwang, Inseong A1 Jang, Jihoon A1 Kim, Hyun YR 2024 SN 2767-7699 K1 Layout K1 Emulation K1 Artificial neural networks K1 Control systems K1 Hardware K1 Central Processing Unit K1 Arrays K1 Processing-in-Memory K1 Simulator K1 Deep Neural Network K1 Compiler SP 1 OP 3 LK http://dx.doi.org/https://doi.org/10.1109/ICEIC61013.2024.10457163 DO https://doi.org/10.1109/ICEIC61013.2024.10457163 SF ELIB - SuUB Bremen
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