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1 Ergebnisse
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Simulation and Extraction of Dual-Gate TFET With Ferroelect..:
, In:
2024 Fourth International Conference on Advances in Electrical, Computing, Communication and Sustainable Technologies (ICAECT)
,
Verma, Ashish
;
Verma, Preeti
;
Vaithiyanathan, Dhandapani
- p. 1-6 , 2024
Link:
https://doi.org/10.1109/ICAECT60202.2024.10469435
RT T1 <cTitle>2024 Fourth International Conference on Advances in Electrical, Computing, Communication and Sustainable Technologies (ICAECT)</cTitle>: T1 <Title>Simulation and Extraction of Dual-Gate TFET With Ferroelectric Material to Preserve Data</Title> UL https://suche.suub.uni-bremen.de/peid=ieee-10469435&Exemplar=1&LAN=DE A1 Verma, Ashish A1 Verma, Preeti A1 Vaithiyanathan, Dhandapani YR 2024 K1 TFETs K1 Nonvolatile memory K1 Ferroelectric materials K1 Random access memory K1 Logic gates K1 Capacitance K1 Transformers K1 non-volatile memories (NVM) K1 SRAM K1 DRAM negative capacitance K1 sub-threshold swing K1 reduced short channel (SCE) K1 memory window K1 sensitivity SP 1 OP 6 LK http://dx.doi.org/https://doi.org/10.1109/ICAECT60202.2024.10469435 DO https://doi.org/10.1109/ICAECT60202.2024.10469435 SF ELIB - SuUB Bremen
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