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1 Ergebnisse
1
Design of Symmetrical Multilevel Inverter Topology With Red..:
, In:
2023 9th IEEE India International Conference on Power Electronics (IICPE)
,
Akhil, Gummadavelli
;
Veligatla, V. Ramesh Babu
- p. 1-4 , 2023
Link:
https://doi.org/10.1109/IICPE60303.2023.10474853
RT T1
2023 9th IEEE India International Conference on Power Electronics (IICPE)
: T1
Design of Symmetrical Multilevel Inverter Topology With Reduced Number of Switches
UL https://suche.suub.uni-bremen.de/peid=ieee-10474853&Exemplar=1&LAN=DE A1 Akhil, Gummadavelli A1 Veligatla, V. Ramesh Babu YR 2023 SN 2160-3170 K1 Circuit topology K1 Total harmonic distortion K1 Costs K1 Switching loss K1 Switches K1 Multilevel inverters K1 Control systems K1 Symmetrical Multilevel Inverters K1 THD K1 Power Switching Devices SP 1 OP 4 LK http://dx.doi.org/https://doi.org/10.1109/IICPE60303.2023.10474853 DO https://doi.org/10.1109/IICPE60303.2023.10474853 SF ELIB - SuUB Bremen
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