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TinyTS: Memory-Efficient TinyML Model Compiler Framework on..:
, In:
2024 IEEE International Symposium on High-Performance Computer Architecture (HPCA)
,
Liu, Yu-Yuan
;
Zheng, Hong-Sheng
;
Fang Hu, Yu
.. - p. 848-860 , 2024
Link:
https://doi.org/10.1109/HPCA57654.2024.00070
RT T1 <cTitle>2024 IEEE International Symposium on High-Performance Computer Architecture (HPCA)</cTitle>: T1 <Title>TinyTS: Memory-Efficient TinyML Model Compiler Framework on Microcontrollers</Title> UL https://suche.suub.uni-bremen.de/peid=ieee-10476479&Exemplar=1&LAN=DE A1 Liu, Yu-Yuan A1 Zheng, Hong-Sheng A1 Fang Hu, Yu A1 Hsu, Chen-Fong A1 Yeh, Tsung Tai YR 2024 SN 2378-203X K1 Schedules K1 Tensors K1 Runtime K1 Microcontrollers K1 Computational modeling K1 Source coding K1 Random access memory K1 TinyML K1 Deep Neural Network K1 Compiler K1 AIoT SP 848 OP 860 LK http://dx.doi.org/https://doi.org/10.1109/HPCA57654.2024.00070 DO https://doi.org/10.1109/HPCA57654.2024.00070 SF ELIB - SuUB Bremen
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