I agree that this site is using cookies. You can find further informations
here
.
X
Login
Merkliste (
0
)
Home
About us
Home About us
Our history
Profile
Press & public relations
Friends
The library in figures
Exhibitions
Projects
Training, internships, careers
Films
Services & Information
Home Services & Information
Lending and interlibrary loans
Returns and renewals
Training and library tours
My Account
Library cards
New to the library?
Download Information
Opening hours
Learning spaces
PC, WLAN, copy, scan and print
Catalogs and collections
Home Catalogs and Collections
Rare books and manuscripts
Digital collections
Subject Areas
Our sites
Home Our sites
Central Library
Law Library (Juridicum)
BB Business and Economics (BB11)
BB Physics and Electrical Engineering
TB Engineering and Social Sciences
TB Economics and Nautical Sciences
TB Music
TB Art & Design
TB Bremerhaven
Contact the library
Home Contact the library
Staff Directory
Open access & publishing
Home Open access & publishing
Reference management: Citavi & RefWorks
Publishing documents
Open Access in Bremen
zur Desktop-Version
Toggle navigation
Merkliste
1 Ergebnisse
1
A Novel 1-bit Fast and Low Power 17-T Full Adder Circuit:
, In:
2024 IEEE International Students' Conference on Electrical, Electronics and Computer Science (SCEECS)
,
Gupta, Kripi
;
Tiwari, Ravindra
;
Singh, Nikita
... - p. 1-5 , 2024
Link:
https://doi.org/10.1109/SCEECS61402.2024.10482063
RT T1
2024 IEEE International Students' Conference on Electrical, Electronics and Computer Science (SCEECS)
: T1
A Novel 1-bit Fast and Low Power 17-T Full Adder Circuit
UL https://suche.suub.uni-bremen.de/peid=ieee-10482063&Exemplar=1&LAN=DE A1 Gupta, Kripi A1 Tiwari, Ravindra A1 Singh, Nikita A1 Agrawal, Aachman A1 Singh, Abhay Pratap A1 Baghel, R. K. YR 2024 SN 2688-0288 K1 Semiconductor device modeling K1 Program processors K1 Power demand K1 Simulation K1 Stability analysis K1 Delays K1 Transistors K1 Arithmetic Logic Units (ALUs) K1 Low-Power Design K1 Hybrid Full Adder (FA) K1 XOR-XNOR circuit K1 Power- Delay Product (PDP) SP 1 OP 5 LK http://dx.doi.org/https://doi.org/10.1109/SCEECS61402.2024.10482063 DO https://doi.org/10.1109/SCEECS61402.2024.10482063 SF ELIB - SuUB Bremen
Export
RefWorks (nur Desktop-Version!)
Flow
(Zuerst in
Flow
einloggen, dann importieren)