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1 Ergebnisse
1
A 2.6-GHz I/O Buffer for DDR4 & DDR5 SDRAMs in 16-nm FinFET..:
, In:
2023 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)
,
Ke, Jhih-Ying
;
Santos Tolentino, Lean Karlo
;
Lo, Cheng-Yao
.. - p. 271-275 , 2023
Link:
https://doi.org/10.1109/APCCAS60141.2023.00068
RT T1
2023 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)
: T1
A 2.6-GHz I/O Buffer for DDR4 & DDR5 SDRAMs in 16-nm FinFET CMOS Process
UL https://suche.suub.uni-bremen.de/peid=ieee-10509932&Exemplar=1&LAN=DE A1 Ke, Jhih-Ying A1 Santos Tolentino, Lean Karlo A1 Lo, Cheng-Yao A1 Lee, Tzung-Je A1 Wang, Chua-Chin YR 2023 SN 2768-3516 K1 Noise K1 Logic gates K1 FinFETs K1 Threshold voltage K1 Silicon K1 MIM capacitors K1 System-on-chip K1 I/O buffer K1 DDR4 K1 DDR5 K1 FinFET K1 slew rate SP 271 OP 275 LK http://dx.doi.org/https://doi.org/10.1109/APCCAS60141.2023.00068 DO https://doi.org/10.1109/APCCAS60141.2023.00068 SF ELIB - SuUB Bremen
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