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Architectural Exploration of Heterogeneous FPGAs for Perfor..:
, In:
2023 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)
,
Mishra, Anubhav
;
Rao, Nanditha
;
Gore, Ganesh
. - p. 232-235 , 2023
Link:
https://doi.org/10.1109/APCCAS60141.2023.00060
RT T1 <cTitle>2023 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)</cTitle>: T1 <Title>Architectural Exploration of Heterogeneous FPGAs for Performance Enhancement of ML Benchmarks</Title> UL https://suche.suub.uni-bremen.de/peid=ieee-10509981&Exemplar=1&LAN=DE A1 Mishra, Anubhav A1 Rao, Nanditha A1 Gore, Ganesh A1 Tang, Xifan YR 2023 SN 2768-3516 K1 Layout K1 Random access memory K1 Machine learning K1 Organizations K1 Benchmark testing K1 Routing K1 Fabrics K1 FPGA K1 Heterogeneous blocks K1 placement K1 performance K1 machine learning SP 232 OP 235 LK http://dx.doi.org/https://doi.org/10.1109/APCCAS60141.2023.00060 DO https://doi.org/10.1109/APCCAS60141.2023.00060 SF ELIB - SuUB Bremen
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