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1 Ergebnisse
1
Quantum Confinement Imposed Constraints in ULP Circuits wit..:
, In:
2024 8th IEEE Electron Devices Technology & Manufacturing Conference (EDTM)
,
Semwal, Sandeep
;
Rai, Nivedita
;
Nirala, Rohit Kumar
.. - p. 1-3 , 2024
Link:
https://doi.org/10.1109/EDTM58488.2024.10511949
RT T1
2024 8th IEEE Electron Devices Technology & Manufacturing Conference (EDTM)
: T1
Quantum Confinement Imposed Constraints in ULP Circuits with Junctionless FET
UL https://suche.suub.uni-bremen.de/peid=ieee-10511949&Exemplar=1&LAN=DE A1 Semwal, Sandeep A1 Rai, Nivedita A1 Nirala, Rohit Kumar A1 Gupta, Manish A1 Kranti, Abhinav YR 2024 K1 Measurement K1 Circuits K1 Noise K1 Potential well K1 Inverters K1 Threshold voltage K1 Semiconductor process modeling K1 Quantum confinement K1 Ultralow Power K1 Junctionless Transistor K1 CMOS Inverter K1 Schmitt Trigger SP 1 OP 3 LK http://dx.doi.org/https://doi.org/10.1109/EDTM58488.2024.10511949 DO https://doi.org/10.1109/EDTM58488.2024.10511949 SF ELIB - SuUB Bremen
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