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1 Ergebnisse
1
Design of PnR Flow For Block Level Chip for Optimizing Leak..:
, In:
2024 Third International Conference on Intelligent Techniques in Control, Optimization and Signal Processing (INCOS)
,
Dargar, Shashi Kant
;
Govardhan, Mopuri
;
Reddy, Kumetha Yashwanth
.. - p. 01-06 , 2024
Link:
https://doi.org/10.1109/INCOS59338.2024.10527496
RT T1
2024 Third International Conference on Intelligent Techniques in Control, Optimization and Signal Processing (INCOS)
: T1
Design of PnR Flow For Block Level Chip for Optimizing Leakage Power
UL https://suche.suub.uni-bremen.de/peid=ieee-10527496&Exemplar=1&LAN=DE A1 Dargar, Shashi Kant A1 Govardhan, Mopuri A1 Reddy, Kumetha Yashwanth A1 Rakesh, Kocherla A1 Kumar Reddy, Panga Tharun YR 2024 K1 Performance evaluation K1 Energy consumption K1 Electronic equipment K1 High-voltage techniques K1 Signal processing K1 Routing K1 Threshold voltage K1 Floorplan K1 CTS K1 Placement K1 TCL K1 Leakage Power K1 Place and Route K1 ASIC K1 HVT K1 LVT K1 SVT SP 01 OP 06 LK http://dx.doi.org/https://doi.org/10.1109/INCOS59338.2024.10527496 DO https://doi.org/10.1109/INCOS59338.2024.10527496 SF ELIB - SuUB Bremen
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