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1 Ergebnisse
1
CMOS Implementation of a Piecewise Linear Activation Functi..:
, In:
2024 2nd International Conference on Device Intelligence, Computing and Communication Technologies (DICCT)
,
Chakraborty, Arindom
;
Hasan, Mehedi
;
Hussain, Md. Shahbaz
... - p. 1-5 , 2024
Link:
https://doi.org/10.1109/DICCT61038.2024.10533157
RT T1
2024 2nd International Conference on Device Intelligence, Computing and Communication Technologies (DICCT)
: T1
CMOS Implementation of a Piecewise Linear Activation Function Based Neuron Unit for Neural Network Accelerator
UL https://suche.suub.uni-bremen.de/peid=ieee-10533157&Exemplar=1&LAN=DE A1 Chakraborty, Arindom A1 Hasan, Mehedi A1 Hussain, Md. Shahbaz A1 Kandpal, Jyoti A1 Hasan, Mohd. A1 Zaman, Hasan U. YR 2024 K1 Power demand K1 Neurons K1 Computer architecture K1 Logic gates K1 CMOS process K1 Vectors K1 Communications technology K1 Neuron Unit K1 Neural Network Accelerator K1 Activation Function K1 Piecewise Linear Unit K1 Multiply-Accumulate SP 1 OP 5 LK http://dx.doi.org/https://doi.org/10.1109/DICCT61038.2024.10533157 DO https://doi.org/10.1109/DICCT61038.2024.10533157 SF ELIB - SuUB Bremen
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