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1 Ergebnisse
1
Area And Speed-Efficient Vedic RISC Processors for Embedded..:
, In:
2024 IEEE 13th International Conference on Communication Systems and Network Technologies (CSNT)
,
Thakur, Dharmendra Singh
;
Kourav, Sateesh
;
Shah, Sunil Kumar
. - p. 1219-1224 , 2024
Link:
https://doi.org/10.1109/CSNT60213.2024.10545858
RT T1 <cTitle>2024 IEEE 13th International Conference on Communication Systems and Network Technologies (CSNT)</cTitle>: T1 <Title>Area And Speed-Efficient Vedic RISC Processors for Embedded Systems</Title> UL https://suche.suub.uni-bremen.de/peid=ieee-10545858&Exemplar=1&LAN=DE A1 Thakur, Dharmendra Singh A1 Kourav, Sateesh A1 Shah, Sunil Kumar A1 Verma, Kirti YR 2024 SN 2473-5655 K1 Program processors K1 Embedded systems K1 Reduced instruction set computing K1 Microcontrollers K1 Computer architecture K1 Hardware K1 Transistors K1 Fpga K1 Rtl K1 Alu K1 Dram K1 Vhdl K1 High-spee K1 Area Optimization K1 Verilog Hdl K1 Xilinx Eda SP 1219 OP 1224 LK http://dx.doi.org/https://doi.org/10.1109/CSNT60213.2024.10545858 DO https://doi.org/10.1109/CSNT60213.2024.10545858 SF ELIB - SuUB Bremen
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