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1 Ergebnisse
1
Charge Trap Flash with Superior Program Efficiency by Negat..:
, In:
2024 International VLSI Symposium on Technology, Systems and Applications (VLSI TSA)
,
Kim, Giuk
;
Choi, Hyojun
;
Lee, Sangho
... - p. 1-2 , 2024
Link:
https://doi.org/10.1109/VLSITSA60681.2024.10546371
RT T1
2024 International VLSI Symposium on Technology, Systems and Applications (VLSI TSA)
: T1
Charge Trap Flash with Superior Program Efficiency by Negative Capacitance-Boosting Effect
UL https://suche.suub.uni-bremen.de/peid=ieee-10546371&Exemplar=1&LAN=DE A1 Kim, Giuk A1 Choi, Hyojun A1 Lee, Sangho A1 Shin, Hunbeom A1 Zhang, Lingwei A1 Lee, Sangmok A1 Nam, Yunseok A1 Kim, Woongjin A1 Ock, Jihye A1 Lee, Sujeong A1 Kang, Hyunjun A1 Jeon, Sanghun YR 2024 K1 Performance evaluation K1 Three-dimensional displays K1 Memory management K1 Process control K1 Very large scale integration K1 Capacitance K1 Service-oriented architecture SP 1 OP 2 LK http://dx.doi.org/https://doi.org/10.1109/VLSITSA60681.2024.10546371 DO https://doi.org/10.1109/VLSITSA60681.2024.10546371 SF ELIB - SuUB Bremen
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