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1 Ergebnisse
1
Complementary Detectors for DUV Sensing by CMOS Logic Techn..:
, In:
2024 International VLSI Symposium on Technology, Systems and Applications (VLSI TSA)
,
Huang, Ting-Kai
;
Yeh, Hsin-Hung
;
Shih, Jiaw-Ren
.. - p. 1-2 , 2024
Link:
https://doi.org/10.1109/VLSITSA60681.2024.10546391
RT T1 <cTitle>2024 International VLSI Symposium on Technology, Systems and Applications (VLSI TSA)</cTitle>: T1 <Title>Complementary Detectors for DUV Sensing by CMOS Logic Technology</Title> UL https://suche.suub.uni-bremen.de/peid=ieee-10546391&Exemplar=1&LAN=DE A1 Huang, Ting-Kai A1 Yeh, Hsin-Hung A1 Shih, Jiaw-Ren A1 Lin, Chrong-Jung A1 King, Ya-Chin YR 2024 K1 Couplings K1 MOSFET K1 Detectors K1 Very large scale integration K1 MOSFET circuits K1 Logic gates K1 CMOS technology SP 1 OP 2 LK http://dx.doi.org/https://doi.org/10.1109/VLSITSA60681.2024.10546391 DO https://doi.org/10.1109/VLSITSA60681.2024.10546391 SF ELIB - SuUB Bremen
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