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1 Ergebnisse
1
A 101-dB SFDR 98.5-dB DR 20-kHz BW Continuous Time Incremen..:
, In:
2024 International VLSI Symposium on Technology, Systems and Applications (VLSI TSA)
,
Wei, Cheng-En
;
Wang, Cheng-Wei
;
Hung, Chen-Hao
... - p. 1-3 , 2024
Link:
https://doi.org/10.1109/VLSITSA60681.2024.10546405
RT T1 <cTitle>2024 International VLSI Symposium on Technology, Systems and Applications (VLSI TSA)</cTitle>: T1 <Title>A 101-dB SFDR 98.5-dB DR 20-kHz BW Continuous Time Incremental Δ∑ ADC with FIR DAC and Robust Reset Timing for Sensor Interfaces</Title> UL https://suche.suub.uni-bremen.de/peid=ieee-10546405&Exemplar=1&LAN=DE A1 Wei, Cheng-En A1 Wang, Cheng-Wei A1 Hung, Chen-Hao A1 Wang, Chi-Han A1 Chou, Chuan-Tai A1 Hung, Duan-Sin A1 Lu, Guan-Wei A1 Chen, Chia-Hung YR 2024 K1 Multiplexing K1 Finite impulse response filters K1 Voltage K1 Bandwidth K1 Very large scale integration K1 Robustness K1 Timing K1 Analog-to-digital converter (ADC) K1 sensor K1 incremental K1 continuous time (CT) K1 finite impulse response (FIR) K1 chopper stabilization SP 1 OP 3 LK http://dx.doi.org/https://doi.org/10.1109/VLSITSA60681.2024.10546405 DO https://doi.org/10.1109/VLSITSA60681.2024.10546405 SF ELIB - SuUB Bremen
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