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CMOS Scaling by Nanosheet Device Architectures and Backside..:

, In: 2024 International VLSI Symposium on Technology, Systems and Applications (VLSI TSA),
Horiguchi, N. ; Mertens, H. ; Ritzenthaler, R.... - p. 1-2 , 2024
Link: https://doi.org/10.1109/VLSITSA60681.2024.10546439