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1 Ergebnisse
1
A Scalable Low-Latency FPGA Architecture for Spin Qubit Con..:
, In:
2024 Design, Automation & Test in Europe Conference & Exhibition (DATE)
,
Toubeix, Mathieu
;
Guthmuller, Eric
;
Evans, Adrian
. - p. 1-2 , 2024
Link:
https://doi.org/10.23919/DATE58400.2024.10546620
RT T1 <cTitle>2024 Design, Automation & Test in Europe Conference & Exhibition (DATE)</cTitle>: T1 <Title>A Scalable Low-Latency FPGA Architecture for Spin Qubit Control Through Direct Digital Synthesis</Title> UL https://suche.suub.uni-bremen.de/peid=ieee-10546620&Exemplar=1&LAN=DE A1 Toubeix, Mathieu A1 Guthmuller, Eric A1 Evans, Adrian A1 Meunier, Tristan YR 2024 SN 1558-1101 K1 Multiplexing K1 Scalability K1 Memory management K1 Random access memory K1 Logic gates K1 Signal generators K1 Hardware K1 direct digital synthesis (DDS) K1 FPGA K1 large scale quantum computing (LSQ) K1 quantum control K1 spin qubits SP 1 OP 2 LK http://dx.doi.org/https://doi.org/10.23919/DATE58400.2024.10546620 DO https://doi.org/10.23919/DATE58400.2024.10546620 SF ELIB - SuUB Bremen
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