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PULSE: Parametric Hardware Units for Low-power Sparsity-Awa..:
, In:
2024 IEEE International Symposium on Circuits and Systems (ISCAS)
,
Aliyev, Ilkin
;
Adegbija, Tosiron
- p. 1-5 , 2024
Link:
https://doi.org/10.1109/ISCAS58744.2024.10558062
RT T1 <cTitle>2024 IEEE International Symposium on Circuits and Systems (ISCAS)</cTitle>: T1 <Title>PULSE: Parametric Hardware Units for Low-power Sparsity-Aware Convolution Engine</Title> UL https://suche.suub.uni-bremen.de/peid=ieee-10558062&Exemplar=1&LAN=DE A1 Aliyev, Ilkin A1 Adegbija, Tosiron YR 2024 SN 2158-1525 K1 Training K1 Power demand K1 Neurons K1 Logic gates K1 Hardware K1 Systolic arrays K1 Robustness K1 Sparsity-aware SNN K1 FPGA K1 parametric hardware design K1 neuromorphic computing SP 1 OP 5 LK http://dx.doi.org/https://doi.org/10.1109/ISCAS58744.2024.10558062 DO https://doi.org/10.1109/ISCAS58744.2024.10558062 SF ELIB - SuUB Bremen
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