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1
A Resource-Constrained Spatio-Temporal Super Resolution Mod..:
, In:
2024 IEEE International Symposium on Circuits and Systems (ISCAS)
,
Jung, Da Hyeon
;
Jeong, Min Wu
;
Nguyen, Xuan Truong
. - p. 1-5 , 2024
Link:
https://doi.org/10.1109/ISCAS58744.2024.10558194
RT T1 <cTitle>2024 IEEE International Symposium on Circuits and Systems (ISCAS)</cTitle>: T1 <Title>A Resource-Constrained Spatio-Temporal Super Resolution Model</Title> UL https://suche.suub.uni-bremen.de/peid=ieee-10558194&Exemplar=1&LAN=DE A1 Jung, Da Hyeon A1 Jeong, Min Wu A1 Nguyen, Xuan Truong A1 Rhee, Chae Eun YR 2024 SN 2158-1525 K1 Deep learning K1 Interpolation K1 Computational modeling K1 Superresolution K1 Estimation K1 Hardware K1 Integrated circuit modeling K1 Super resolution K1 Frame interpolation K1 Spatiotemporal super resolution K1 Lightweight deep learning model K1 Resource-efficient hardware SP 1 OP 5 LK http://dx.doi.org/https://doi.org/10.1109/ISCAS58744.2024.10558194 DO https://doi.org/10.1109/ISCAS58744.2024.10558194 SF ELIB - SuUB Bremen
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