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1 Ergebnisse
1
Parallel AIG Refactoring via Conflict Breaking:
, In:
2024 IEEE International Symposium on Circuits and Systems (ISCAS)
,
Cai, Ye
;
Yang, Zonglin
;
Ni, Liwei
... - p. 1-5 , 2024
Link:
https://doi.org/10.1109/ISCAS58744.2024.10558523
RT T1 <cTitle>2024 IEEE International Symposium on Circuits and Systems (ISCAS)</cTitle>: T1 <Title>Parallel AIG Refactoring via Conflict Breaking</Title> UL https://suche.suub.uni-bremen.de/peid=ieee-10558523&Exemplar=1&LAN=DE A1 Cai, Ye A1 Yang, Zonglin A1 Ni, Liwei A1 Liu, Junfeng A1 Xie, Biwei A1 Li, Xingquan YR 2024 SN 2158-1525 K1 Integrated circuits K1 Design automation K1 Circuits and systems K1 Scalability K1 Parallel processing K1 Benchmark testing K1 Central Processing Unit K1 Logic Optimization K1 Parallelization K1 Refactoring K1 AIG SP 1 OP 5 LK http://dx.doi.org/https://doi.org/10.1109/ISCAS58744.2024.10558523 DO https://doi.org/10.1109/ISCAS58744.2024.10558523 SF ELIB - SuUB Bremen
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