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Route Critical Nets in Upper Layers to Fix Timing Issues in..:

, In: 2024 IEEE 4th International Conference on VLSI Systems, Architecture, Technology and Applications (VLSI SATA),
Krishnamoorthy, Raja ; Ahamed, M. Irshad ; Balaji, Polisetty... - p. 1-5 , 2024
Link: https://doi.org/10.1109/VLSISATA61709.2024.10560134