I agree that this site is using cookies. You can find further informations
here
.
X
Login
Merkliste (
0
)
Home
About us
Home About us
Our history
Profile
Press & public relations
Friends
The library in figures
Exhibitions
Projects
Training, internships, careers
Films
Services & Information
Home Services & Information
Lending and interlibrary loans
Returns and renewals
Training and library tours
My Account
Library cards
New to the library?
Download Information
Opening hours
Learning spaces
PC, WLAN, copy, scan and print
Catalogs and collections
Home Catalogs and Collections
Rare books and manuscripts
Digital collections
Subject Areas
Our sites
Home Our sites
Central Library
Law Library (Juridicum)
BB Business and Economics (BB11)
BB Physics and Electrical Engineering
TB Engineering and Social Sciences
TB Economics and Nautical Sciences
TB Music
TB Art & Design
TB Bremerhaven
Contact the library
Home Contact the library
Staff Directory
Open access & publishing
Home Open access & publishing
Reference management: Citavi & RefWorks
Publishing documents
Open Access in Bremen
zur Desktop-Version
Toggle navigation
Merkliste
1 Ergebnisse
1
Hardware Implementations of Interleaved Modular Multiplicat..:
, In:
2024 3rd International Conference on Advancement in Electrical and Electronic Engineering (ICAEEE)
,
Apon, Imtiaz Ahamed
;
Hasan, Md Ratul
;
Haque, Md. Salman
- p. 1-5 , 2024
Link:
https://doi.org/10.1109/ICAEEE62219.2024.10561684
RT T1
2024 3rd International Conference on Advancement in Electrical and Electronic Engineering (ICAEEE)
: T1
Hardware Implementations of Interleaved Modular Multiplications Over F256
UL https://suche.suub.uni-bremen.de/peid=ieee-10561684&Exemplar=1&LAN=DE A1 Apon, Imtiaz Ahamed A1 Hasan, Md Ratul A1 Haque, Md. Salman YR 2024 K1 Program processors K1 Computer architecture K1 Very large scale integration K1 NIST K1 Elliptic curve cryptography K1 Throughput K1 Hardware K1 Elliptic Curve (EC) K1 Elliptic Curve Cryptographic Processor (ECP) K1 Elliptic Curve Cryptography (ECC) K1 Interleaved Modular Multiplication (IMM) K1 Hardware Architecture (HA) K1 Field Programmable Gate Array (FPGA) K1 The National Institute of Standards and Technology (NIST) SP 1 OP 5 LK http://dx.doi.org/https://doi.org/10.1109/ICAEEE62219.2024.10561684 DO https://doi.org/10.1109/ICAEEE62219.2024.10561684 SF ELIB - SuUB Bremen
Export
RefWorks (nur Desktop-Version!)
Flow
(Zuerst in
Flow
einloggen, dann importieren)