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1 Ergebnisse
1
Elucidating the mechanism of four corner voids in chip-on-w..:
, In:
2024 IEEE 74th Electronic Components and Technology Conference (ECTC)
,
Hirano, Takaaki
;
Hiratsuka, Tatsumasa
;
Yoshioka, Hirotaka
... - p. 1241-1245 , 2024
Link:
https://doi.org/10.1109/ECTC51529.2024.00200
RT T1 <cTitle>2024 IEEE 74th Electronic Components and Technology Conference (ECTC)</cTitle>: T1 <Title>Elucidating the mechanism of four corner voids in chip-on-wafer hybrid bonding</Title> UL https://suche.suub.uni-bremen.de/peid=ieee-10564938&Exemplar=1&LAN=DE A1 Hirano, Takaaki A1 Hiratsuka, Tatsumasa A1 Yoshioka, Hirotaka A1 Ogawa, Naoki A1 Saito, Suguru A1 Kobayashi, Shoji A1 Hagimoto, Yoshiya A1 Iwamoto, Hayato YR 2024 SN 2377-5726 K1 Semiconductor device modeling K1 Performance evaluation K1 Process design K1 Three-dimensional displays K1 Manufacturing processes K1 Shape K1 Atmospheric modeling K1 chip on wafer K1 hybrid bonding K1 simulation K1 voids K1 manufacturing process SP 1241 OP 1245 LK http://dx.doi.org/https://doi.org/10.1109/ECTC51529.2024.00200 DO https://doi.org/10.1109/ECTC51529.2024.00200 SF ELIB - SuUB Bremen
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