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1
CGAT- TICER: A Compressed GAT-based TICER for RC Reduction:
, In:
2024 2nd International Symposium of Electronics Design Automation (ISEDA)
,
Zhong, Yuchao
;
Zuo, Yunfan
;
Tian, Leyun
.. - p. 155-159 , 2024
Link:
https://doi.org/10.1109/ISEDA62518.2024.10617713
RT T1 <cTitle>2024 2nd International Symposium of Electronics Design Automation (ISEDA)</cTitle>: T1 <Title>CGAT- TICER: A Compressed GAT-based TICER for RC Reduction</Title> UL https://suche.suub.uni-bremen.de/peid=ieee-10617713&Exemplar=1&LAN=DE A1 Zhong, Yuchao A1 Zuo, Yunfan A1 Tian, Leyun A1 Hu, Sen A1 Yan, Hao YR 2024 K1 Accuracy K1 Circuit simulation K1 Integrated circuit interconnections K1 Transforms K1 Very large scale integration K1 Distance measurement K1 Classification algorithms K1 Model Order Reduction K1 TICER K1 Graph Attention Network SP 155 OP 159 LK http://dx.doi.org/https://doi.org/10.1109/ISEDA62518.2024.10617713 DO https://doi.org/10.1109/ISEDA62518.2024.10617713 SF ELIB - SuUB Bremen
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