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1 Ergebnisse
1
Aging-Aware Logic Restructure Acceleration Based on Heterog..:
, In:
2024 2nd International Symposium of Electronics Design Automation (ISEDA)
,
Xue, Zun
;
Liu, Yuchen
;
Ye, Yuyang
... - p. 480-485 , 2024
Link:
https://doi.org/10.1109/ISEDA62518.2024.10617843
RT T1 <cTitle>2024 2nd International Symposium of Electronics Design Automation (ISEDA)</cTitle>: T1 <Title>Aging-Aware Logic Restructure Acceleration Based on Heterogeneous Graph Learning</Title> UL https://suche.suub.uni-bremen.de/peid=ieee-10617843&Exemplar=1&LAN=DE A1 Xue, Zun A1 Liu, Yuchen A1 Ye, Yuyang A1 Chen, Tinghuan A1 Yan, Hao A1 Shi, Longxing YR 2024 K1 Negative bias temperature instability K1 Runtime K1 Thermal variables control K1 Heuristic algorithms K1 Logic gates K1 Predictive models K1 Encoding K1 Logic restructure K1 Timing optimization K1 Aging K1 NBTI SP 480 OP 485 LK http://dx.doi.org/https://doi.org/10.1109/ISEDA62518.2024.10617843 DO https://doi.org/10.1109/ISEDA62518.2024.10617843 SF ELIB - SuUB Bremen
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