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1 Ergebnisse
1
An Area-Efficient Low-Power Fully Non-Volatile Full-Adder u..:
, In:
2024 IEEE 24th International Conference on Nanotechnology (NANO)
,
Shen, Zhongkun
;
Deng, Erya
;
You, Jiaqi
... - p. 561-564 , 2024
Link:
https://doi.org/10.1109/NANO61778.2024.10628974
RT T1 <cTitle>2024 IEEE 24th International Conference on Nanotechnology (NANO)</cTitle>: T1 <Title>An Area-Efficient Low-Power Fully Non-Volatile Full-Adder using Reconfigurable Logic</Title> UL https://suche.suub.uni-bremen.de/peid=ieee-10628974&Exemplar=1&LAN=DE A1 Shen, Zhongkun A1 Deng, Erya A1 You, Jiaqi A1 Hu, Qingting A1 Wang, You A1 Gong, Yu A1 Wu, Bi A1 Liu, Weiqiang YR 2024 SN 1944-9380 K1 Semiconductor device modeling K1 Power demand K1 Torque K1 Nonvolatile memory K1 Simulation K1 Circuits K1 Reconfigurable logic K1 Logic-in-memory K1 magnetic tunnel junction K1 reconfigurable K1 non-volatile full-adder SP 561 OP 564 LK http://dx.doi.org/https://doi.org/10.1109/NANO61778.2024.10628974 DO https://doi.org/10.1109/NANO61778.2024.10628974 SF ELIB - SuUB Bremen
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