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Cell to Core-Periphery Overlap (C2O) Based on BCAT for Next..:

, In: 2024 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits),

Lee, Kiseok ; Lee, Hongjun ; Choi, Hyungeun... - p. 1-2 , 2024

Link: https://doi.org/10.1109/VLSITechnologyandCir46783.2024..

RT 
T1 <cTitle>2024 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)</cTitle>: T1 <Title>Cell to Core-Periphery Overlap (C2O) Based on BCAT for Next Generation DRAM</Title>

UL https://suche.suub.uni-bremen.de/peid=ieee-10631320&Exemplar=1&LAN=DE
				
A1 Lee, Kiseok
A1 Lee, Hongjun
A1 Choi, Hyungeun
A1 Kim, Jeongsu
A1 Kim, Kyunghwan
A1 Jeong, Moonyoung
A1 Bae, Soohyun
A1 Kim, Hyebin
A1 Lee, Jiyun
A1 Kim, Minsoo
A1 Kim, Keunnam
A1 Kim, Huijung
A1 Park, Sungmin
A1 Park, Taejin
A1 Han, Jin-woo
A1 Oh, Jeonghoon
A1 Kim, Yong Kwan
A1 Yim, Sungsoo
A1 Kim, Bongsoo
A1 Park, Jemin
A1 Song, Jaihyuk
YR 2024
SN 2158-9682
K1 Wafer bonding
K1 Microprocessors
K1 Random access memory
K1 Computer architecture
K1 Very large scale integration
K1 Threshold voltage
K1 Sensors
K1 DRAM
K1 Cell to Core-Periphery Overlap
K1 Wafer Bonding
K1 BCAT
SP 1
OP 2
LK http://dx.doi.org/https://doi.org/10.1109/VLSITechnologyandCir46783.2024.10631320
DO https://doi.org/10.1109/VLSITechnologyandCir46783.2024.10631320
SF ELIB - SuUB Bremen

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