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1
Limits of VLSI:
, In:
1980 IEEE International Solid-State Circuits Conference. Digest of Technical Papers
,
Pashley, R.
;
Terman, L.
- p. 191 , 1980
Link:
https://doi.org/10.1109/ISSCC.1980.1156106
RT T1
1980 IEEE International Solid-State Circuits Conference. Digest of Technical Papers
: T1
Limits of VLSI
UL https://suche.suub.uni-bremen.de/peid=ieee-1156106&Exemplar=1&LAN=DE A1 Pashley, R. A1 Terman, L. YR 1980 K1 Very large scale integration K1 MOS devices K1 CMOS technology K1 Delay K1 Electric resistance K1 Capacitance K1 Isolation technology K1 Laboratories K1 Lithography K1 Dry etching SP 191 LK http://dx.doi.org/https://doi.org/10.1109/ISSCC.1980.1156106 DO https://doi.org/10.1109/ISSCC.1980.1156106 SF ELIB - SuUB Bremen
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