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Low temperature CMOS 8 × 8b multipliers with sub 10ns speed:

, In: 1985 IEEE International Solid-State Circuits Conference. Digest of Technical Papers,
Hanamura, S. ; Aoki, M. ; Masuhara, T.... - p. 210,211 , 1985
Link: https://doi.org/10.1109/ISSCC.1985.1156789