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1 Ergebnisse
1
A dynamically reconfigurable interconnection chip:
, In:
1987 IEEE International Solid-State Circuits Conference. Digest of Technical Papers
,
Chin-Yuan Chin
;
Wen-Tai Lin
;
Juh-Ping Hwang
... - p. 276,277 , 1987
Link:
https://doi.org/10.1109/ISSCC.1987.1157188
RT T1
1987 IEEE International Solid-State Circuits Conference. Digest of Technical Papers
: T1
A dynamically reconfigurable interconnection chip
UL https://suche.suub.uni-bremen.de/peid=ieee-1157188&Exemplar=1&LAN=DE A1 Chin-Yuan Chin A1 Wen-Tai Lin A1 Juh-Ping Hwang A1 Sow Chu A1 Forman, G. A1 Dunki-Jacobs, R. A1 Karr, S. A1 Mallick, J. A1 Kung, H. A1 Sussman, A. A1 Hsu, F.H. A1 Nishizawa, T. YR 1987 K1 Delay K1 Pipeline processing K1 Computer interfaces K1 Data flow computing K1 Processor scheduling K1 Synchronization K1 Clocks K1 Shift registers K1 Research and development K1 Systolic arrays SP 276,277 LK http://dx.doi.org/https://doi.org/10.1109/ISSCC.1987.1157188 DO https://doi.org/10.1109/ISSCC.1987.1157188 SF ELIB - SuUB Bremen
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