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1
Solving constraints on the invisible bits of the intermedia..:
, In:
17th IEEE Symposium on Computer Arithmetic (ARITH'05)
,
Aharoni, M.
;
Asaf, S.
;
Maharik, R.
... - p. 76,77,78,79,80,81,82,83 , 2005
Link:
https://doi.org/10.1109/ARITH.2005.38
RT T1
17th IEEE Symposium on Computer Arithmetic (ARITH'05)
: T1
Solving constraints on the invisible bits of the intermediate result for floating-point verification
UL https://suche.suub.uni-bremen.de/peid=ieee-1467625&Exemplar=1&LAN=DE A1 Aharoni, M. A1 Asaf, S. A1 Maharik, R. A1 Nehama, I. A1 Nikulshin, I. A1 Ziv, A. YR 2005 SN 1063-6889 K1 Testing K1 Subspace constraints K1 Digital arithmetic SP 76,77,78,79,80,81,82,83 LK http://dx.doi.org/https://doi.org/10.1109/ARITH.2005.38 DO https://doi.org/10.1109/ARITH.2005.38 SF ELIB - SuUB Bremen
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