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1 Ergebnisse
1
Highly scalable and reliable 2-bit/cell SONOS memory transi..:
, In:
Digest of Technical Papers. 2005 Symposium on VLSI Technology, 2005.
,
Byung Yong Choi
;
Dong Won Kim
;
Choong-Ho Lee
... - p. 118,119 , 2005
Link:
https://doi.org/10.1109/.2005.1469235
RT T1
Digest of Technical Papers. 2005 Symposium on VLSI Technology, 2005.
: T1
Highly scalable and reliable 2-bit/cell SONOS memory transistor beyond 50nm NVM technology using outer sidewall spacer scheme with damascene gate process
UL https://suche.suub.uni-bremen.de/peid=ieee-1469235&Exemplar=1&LAN=DE A1 Byung Yong Choi A1 Dong Won Kim A1 Choong-Ho Lee A1 Donggun Park A1 Byung-Gook Park A1 Yong Kyu Lee A1 Suk Kang Sung A1 Tae Yong Kim A1 Eun Suk Cho A1 Hye Jin Cho A1 Chang Woo Oh A1 Sung Hwan Kim YR 2005 SN 0743-1562 SN 2158-9682 K1 SONOS devices K1 Nonvolatile memory K1 Space technology K1 Transistors K1 Scalability K1 Silicon compounds K1 Computer science K1 Research and development K1 Semiconductor device reliability K1 Electron traps SP 118,119 LK http://dx.doi.org/https://doi.org/10.1109/.2005.1469235 DO https://doi.org/10.1109/.2005.1469235 SF ELIB - SuUB Bremen
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