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A thermally-aware performance analysis of vertically integr..:
, In:
2006 43rd ACM/IEEE Design Automation Conference
,
Loi, G.L.
;
Agrawal, B.
;
Srivastava, N.
... - p. 991-996 , 2006
Link:
https://doi.org/10.1145/1146909.1147160
RT T1
2006 43rd ACM/IEEE Design Automation Conference
: T1
A thermally-aware performance analysis of vertically integrated (3-D) processor-memory hierarchy
UL https://suche.suub.uni-bremen.de/peid=ieee-1688943&Exemplar=1&LAN=DE A1 Loi, G.L. A1 Agrawal, B. A1 Srivastava, N. A1 Sheng-Chih Lin A1 Sherwood, T. A1 Banerjee, K. YR 2006 SN 0738-100X K1 Performance analysis K1 Frequency K1 Temperature sensors K1 Integrated circuit interconnections K1 Integrated circuit technology K1 Integrated circuit reliability K1 Clocks K1 Performance gain K1 System performance K1 Power generation K1 Design K1 Performance K1 Reliability K1 3D ICs K1 processor-memory K1 performance modeling K1 thermal analysis K1 three dimensional K1 vertical integration K1 VLSI SP 991 OP 996 LK http://dx.doi.org/https://doi.org/10.1145/1146909.1147160 DO https://doi.org/10.1145/1146909.1147160 SF ELIB - SuUB Bremen
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