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A Raised Source/Drain Extension pFET on Si (110) Realized b..:
, In:
2006 Symposium on VLSI Technology, 2006. Digest of Technical Papers.
,
Nagashima, N.
;
Kimura, T.
;
Yamakawa, S.
... - p. 190-191 , 2006
Link:
https://doi.org/10.1109/VLSIT.2006.1705281
RT T1 <cTitle>2006 Symposium on VLSI Technology, 2006. Digest of Technical Papers.</cTitle>: T1 <Title>A Raised Source/Drain Extension pFET on Si (110) Realized by In-situ Doped Selective Epitaxy Technology</Title> UL https://suche.suub.uni-bremen.de/peid=ieee-1705281&Exemplar=1&LAN=DE A1 Nagashima, N. A1 Kimura, T. A1 Yamakawa, S. A1 Kanda, S. A1 Yamamoto, R. A1 Hiyama, S. A1 Fujita, S. A1 Miyanami, Y. A1 Ikuta, T. A1 Nagano, K. A1 Hirano, T. A1 Kadomura, S. A1 Kataoka, T. A1 Kato, T. A1 Tateshita, Y. A1 Kikuchi, Y. A1 Wang, J. A1 Saito, M. A1 Ohno, T. A1 Iwamoto, H. A1 Kamide, Y. A1 Tagawa, Y. A1 Yamagishi, N. A1 Kugimiya, K. YR 2006 SN 0743-1562 SN 2158-9682 K1 Epitaxial growth K1 Silicon compounds K1 Ion implantation K1 Fabrication K1 Annealing K1 MOSFET circuits K1 Dielectrics K1 Oxidation K1 Etching K1 Atomic layer deposition SP 190 OP 191 LK http://dx.doi.org/https://doi.org/10.1109/VLSIT.2006.1705281 DO https://doi.org/10.1109/VLSIT.2006.1705281 SF ELIB - SuUB Bremen
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