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1 Ergebnisse
1
Signed multiple-valued PLAs and the design of fast multiple..:
, In:
1991 IEEE International Symposium on Circuits and Systems (ISCAS)
,
Feng Zhao Zhi
;
Hua Shan
;
Huang Ze Liu
. - p. 2216,2217,2218,2219 , 1991
Link:
https://doi.org/10.1109/ISCAS.1991.176741
RT T1 <cTitle>1991 IEEE International Symposium on Circuits and Systems (ISCAS)</cTitle>: T1 <Title>Signed multiple-valued PLAs and the design of fast multiple-valued arithmetic operation units for systolic MV-DTW processor</Title> UL https://suche.suub.uni-bremen.de/peid=ieee-176741&Exemplar=1&LAN=DE A1 Feng Zhao Zhi A1 Hua Shan A1 Huang Ze Liu A1 Chen Dao Wen YR 1991 K1 Programmable logic arrays K1 Arithmetic K1 Design automation K1 Minimization K1 Speech recognition K1 Automatic speech recognition K1 Logic functions K1 Logic arrays K1 Pattern recognition K1 Information science SP 2216,2217,2218,2219 LK http://dx.doi.org/https://doi.org/10.1109/ISCAS.1991.176741 DO https://doi.org/10.1109/ISCAS.1991.176741 SF ELIB - SuUB Bremen
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