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1 Ergebnisse
1
A comparison of low power architectures for digital delay m..:
, In:
IEEE Computer Society Annual Symposium on VLSI (ISVLSI '07)
,
Martin-Pirchio, Franco
;
Chacon-Rodriguez, Alfonso
;
Julian, Pedro
. - p. None , 2007
Link:
https://doi.org/10.1109/ISVLSI.2007.3
RT T1
IEEE Computer Society Annual Symposium on VLSI (ISVLSI '07)
: T1
A comparison of low power architectures for digital delay measurement
UL https://suche.suub.uni-bremen.de/peid=ieee-4208971&Exemplar=1&LAN=DE A1 Martin-Pirchio, Franco A1 Chacon-Rodriguez, Alfonso A1 Julian, Pedro A1 Mandolesi, Pablo YR 2007 SN 2159-3469 SN 2159-3477 K1 Power measurement K1 Counting circuits K1 Power dissipation K1 Registers K1 Energy consumption K1 Computer architecture K1 Measurement standards K1 Delay effects K1 Synchronization K1 Delay estimation SP None LK http://dx.doi.org/https://doi.org/10.1109/ISVLSI.2007.3 DO https://doi.org/10.1109/ISVLSI.2007.3 SF ELIB - SuUB Bremen
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