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1 Ergebnisse
1
An Efficient Scalable Parallel Hardware Architecture for Mu..:
, In:
2007 3rd Southern Conference on Programmable Logic
,
Nuno-Maganda, Marco Aurelio
;
Arias-Estrada, Miguel
;
Torres-Huitzil, Cesar
- p. None , 2007
Link:
https://doi.org/10.1109/SPL.2007.371742
RT T1
2007 3rd Southern Conference on Programmable Logic
: T1
An Efficient Scalable Parallel Hardware Architecture for Multilayer Spiking Neural Networks
UL https://suche.suub.uni-bremen.de/peid=ieee-4234339&Exemplar=1&LAN=DE A1 Nuno-Maganda, Marco Aurelio A1 Arias-Estrada, Miguel A1 Torres-Huitzil, Cesar YR 2007 K1 Multi-layer neural network K1 Neural network hardware K1 Neural networks K1 Artificial neural networks K1 Computer architecture K1 Biological system modeling K1 Biology computing K1 Neurons K1 Computer networks K1 Bandwidth SP None LK http://dx.doi.org/https://doi.org/10.1109/SPL.2007.371742 DO https://doi.org/10.1109/SPL.2007.371742 SF ELIB - SuUB Bremen
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