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An 80nm 4Gb/s/pin 32b 512Mb GDDR4 Graphics DRAM with Low-Po..:

, In: 2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers,

Ihm, Jeong-Don ; Bang, Sam-Young ; Lee, Mi-Jin... - p. None , 2007

Link: https://doi.org/10.1109/ISSCC.2007.373509

RT 
T1 <cTitle>2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers</cTitle>: T1 <Title>An 80nm 4Gb/s/pin 32b 512Mb GDDR4 Graphics DRAM with Low-Power and Low-Noise Data-Bus Inversion</Title>

UL https://suche.suub.uni-bremen.de/peid=ieee-4242480&Exemplar=1&LAN=DE
				
A1 Ihm, Jeong-Don
A1 Bang, Sam-Young
A1 Lee, Mi-Jin
A1 Moon, Gil-Shin
A1 Jang, Young-Wook
A1 Hwang, Suk-Won
A1 Cho, Young-Chul
A1 Hwang, Sang-Jun
A1 Kim, Dae-Hyun
A1 Lim, Ji-Hoon
A1 Kim, Jae-Sung
A1 Bae, Seung-Jun
A1 Park, Su-Jin
A1 Park, Ok-Joo
A1 Yang, Se-Mi
A1 Choi, Jin-Yong
A1 Kim, Young-Wook
A1 Lee, Hyun-Kyu
A1 Kim, Sung-Hoon
A1 Jang, Seong-Jin
A1 Jun, Young-Hyun
A1 Cho, Soo-in
A1 Park, Kwang-Il
A1 Song, Ho-Young
A1 Lee, Woo-Jin
A1 Kim, Hyun-Jin
A1 Kim, Kyung-Ho
A1 Lee, Ho-Kyung
A1 Park, Min-Sang
YR 2007
SN 0193-6530
SN 2376-8606
K1 Graphics
K1 Random access memory
K1 Crosstalk
K1 Clocks
K1 Jitter
K1 Circuits
K1 Shape control
K1 Noise reduction
K1 Working environment noise
K1 Detectors
SP None
LK http://dx.doi.org/https://doi.org/10.1109/ISSCC.2007.373509
DO https://doi.org/10.1109/ISSCC.2007.373509
SF ELIB - SuUB Bremen

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