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1 Ergebnisse
1
Band Engineered Charge Trap Layer for highly Reliable MLC F..:
, In:
2007 IEEE Symposium on VLSI Technology
,
Huo, ZongLiang
;
Yang, JunKyu
;
Lim, SeungHyun
... - p. None , 2007
Link:
https://doi.org/10.1109/VLSIT.2007.4339758
RT T1
2007 IEEE Symposium on VLSI Technology
: T1
Band Engineered Charge Trap Layer for highly Reliable MLC Flash Memory
UL https://suche.suub.uni-bremen.de/peid=ieee-4339758&Exemplar=1&LAN=DE A1 Huo, ZongLiang A1 Yang, JunKyu A1 Lim, SeungHyun A1 Baik, SeungJae A1 Lee, Juyul A1 Han, JeongHee A1 Yeo, In-Seok A1 Chung, U-In A1 Moon, Joo Tae A1 Ryu, Byung-II YR 2007 SN 0743-1562 SN 2158-9682 K1 Reliability engineering K1 Flash memory K1 Aluminum oxide K1 Electron traps K1 Temperature K1 Silicon compounds K1 Degradation K1 Tunneling K1 Low voltage K1 Leakage current K1 Charge Trap Flash (CTF) K1 Multi-Level Cell (MLC) K1 TANOS SP None LK http://dx.doi.org/https://doi.org/10.1109/VLSIT.2007.4339758 DO https://doi.org/10.1109/VLSIT.2007.4339758 SF ELIB - SuUB Bremen
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