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1 Ergebnisse
1
An optimal algorithm for sizing sequential circuits for ind..:
, In:
2008 Asia and South Pacific Design Automation Conference
,
Roy, Sanghamitra
;
Hu, Yu Hen
;
Chen, Charlie Chung-Ping
... - p. None , 2008
Link:
https://doi.org/10.1109/ASPDAC.2008.4483929
RT T1
2008 Asia and South Pacific Design Automation Conference
: T1
An optimal algorithm for sizing sequential circuits for industrial library based designs
UL https://suche.suub.uni-bremen.de/peid=ieee-4483929&Exemplar=1&LAN=DE A1 Roy, Sanghamitra A1 Hu, Yu Hen A1 Chen, Charlie Chung-Ping A1 Hung, Shih-Pin A1 Chiang, Tse-Yu A1 Tseng, Jiuan-Guei YR 2008 SN 2153-6961 SN 2153-697X K1 Sequential circuits K1 Libraries K1 Algorithm design and analysis K1 Clocks K1 Delay K1 Combinational circuits K1 Design optimization K1 Feedback loop K1 Flip-flops K1 Integrated circuit synthesis SP None LK http://dx.doi.org/https://doi.org/10.1109/ASPDAC.2008.4483929 DO https://doi.org/10.1109/ASPDAC.2008.4483929 SF ELIB - SuUB Bremen
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