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1 Ergebnisse
1
From Transistor to PLL - Analogue Design and EDA Methods:
, In:
2008 Design, Automation and Test in Europe
,
Binkley, David M
;
Graeb, Helmut
;
Gielen, Georges G.E.
. - p. None , 2008
Link:
https://doi.org/10.1109/DATE.2008.4484643
RT T1
2008 Design, Automation and Test in Europe
: T1
From Transistor to PLL - Analogue Design and EDA Methods
UL https://suche.suub.uni-bremen.de/peid=ieee-4484643&Exemplar=1&LAN=DE A1 Binkley, David M A1 Graeb, Helmut A1 Gielen, Georges G.E. A1 Roychowdhury, Jaijeet YR 2008 SN 1530-1591 SN 1558-1101 K1 Phase locked loops K1 Design methodology K1 Electronic design automation and methodology K1 Testing K1 Power dissipation K1 Manufacturing K1 Design optimization K1 Pareto optimization K1 Energy management SP None LK http://dx.doi.org/https://doi.org/10.1109/DATE.2008.4484643 DO https://doi.org/10.1109/DATE.2008.4484643 SF ELIB - SuUB Bremen
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