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An 8-bit 1.8 V 500 MS/s CMOS DAC with a novel four-stage cu..:
, In:
2008 IEEE International Symposium on Circuits and Systems (ISCAS)
,
Sarkar, Santanu
;
Prasad, Ravi sankar
;
Dey, Sanjoy Kumar
.. - p. None , 2008
Link:
https://doi.org/10.1109/ISCAS.2008.4541376
RT T1
2008 IEEE International Symposium on Circuits and Systems (ISCAS)
: T1
An 8-bit 1.8 V 500 MS/s CMOS DAC with a novel four-stage current steering architecture
UL https://suche.suub.uni-bremen.de/peid=ieee-4541376&Exemplar=1&LAN=DE A1 Sarkar, Santanu A1 Prasad, Ravi sankar A1 Dey, Sanjoy Kumar A1 Belde, Vinay A1 Banerjee, Swapna YR 2008 SN 0271-4302 SN 2158-1525 K1 CMOS technology K1 Analog-digital conversion K1 Digital-to-frequency converters K1 Frequency domain analysis K1 Matrix converters K1 Decoding K1 CMOS logic circuits K1 Block codes K1 SPICE K1 MATLAB SP None LK http://dx.doi.org/https://doi.org/10.1109/ISCAS.2008.4541376 DO https://doi.org/10.1109/ISCAS.2008.4541376 SF ELIB - SuUB Bremen
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