I agree that this site is using cookies. You can find further informations here.
X
Merkliste 
 1 Ergebnisse 
 
1

VLSI decoding architecture with improved convergence speed ..:

, In: 2008 IEEE International Symposium on Circuits and Systems (ISCAS),
Yeong-Luh Ueng ; Chung-Jay Yang ; Zong-Cheng Wu.. - p. None , 2008
Link: https://doi.org/10.1109/ISCAS.2008.4541469